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Team:PKU Beijing/Project/AND Gate 2 Result
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Revision as of 13:13, 16 October 2009 by
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Project
Project Home
Summary
Logic Design
AND Gate 1
AND Gate 1 Design
Sensor Result
AND Gate 1 Result
Bistable
Bistable Design
Bistable Result
AND Gate 2
AND Gate 2 Design
AND Gate 2 Result
OR Gate & Output
Assemble
Safety
Original ATGCGCTGCCCTTTCTGTCGTCATTCAGCGCATACCCGCACCAGCCGGTATGTGAGTGAC Mutated ATGCGCTGCCCTTTCTGTCGTCATTAGGCGCATACCCGCACCAGCCGGTATGTGAGTGAC ************************* ********************************* Original AATGTCAAAGAAAGTTATCTCCAGTGCCAGAATATTTACTGTTCGGCGACATTTAAAACG Mutated AATGTCAAAGAAAGTTATCTCCAGTGCCAGAATATTTACTGTTCGGCGACATTTAAAACG ************************************************************ Original CATGAGTCAATTTGTGCCGTGATTCGTTCTCCGGTCACGGAGGAAAAACCAGCACCGGCA Mutated CATGAGTCAATTTGTGCCGTGATTCGTTCTCCGGTCACGGAGGAAAAACCAGCACCGGCA ************************************************************ Original AGCACAGCACCGGCTGTTGTCCGAAAAGTTAAAGGCTGTTACAGCTCACCATTCAACCAT Mutated AGCACAGCACCGGCTGTTGTCCGAAAAGTTAAAGGCTGTTACAGCTCACCATTCAACCAT ************************************************************ Original TAA Mutated TAA ***
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